1. Field Of The Invention
This invention relates to static random access memory (SRAM) and, more particularly, to apparatus for testing the condition of SRAM cells.
2. History Of The Prior Art
SRAM memory arrays are more useful for some purposes than are more conventional DRAM memory arrays because they are capable of storing data without the need to constantly refresh the cells of the memory. To provide this ability, the typical SRAM cell includes six transistors instead of the single transistor of a DRAM cell. Because SRAM cells include several more elements than DRAM cells, SRAM cells are more likely to have defects than are DRAM cells. If there is a defect in a SRAM cell, the replacement of such circuitry is expensive.
Although there are numerous tests used in industry to detect defects in memory arrays, these tests typically are able to detect only gross defects. There are two major reasons for this. First, the tests for defects which may be accomplished once an electronic part reaches production must be tests which can be conducted very rapidly or the cost of the part will increase radically. Second, because production line tests must be rapid, they must use the terminals available on the particular part. Usually, this means the parts must use the input and output terminals provided for normal use of the parts; certainly, the testing of individual memory cells using probes is excluding as too expensive for production line testing.
Dramatic defects in a SRAM cell may be easily detected by production line testing. For example, a typical production line test for detecting defects in a memory array is to write a data pattern to all of the cells of an array and then to read from all of the cells of the array to determine the conditions which resulted. If electric conductors within a cell are incorrectly short or open circuited, the cell will not store the correct one condition; and this will be detected by the test. Such tests are capable of measuring gross open circuit defects or gross short circuit defects.
However, important operating defects in a cell may take a very long time to become apparent. Often cells with marginal defects affecting operation will pass this sort of write/read test yet fail at some later time. For example, if a P channel pull up device in a SRAM cell is disconnected, this will cause the condition of the cell to switch after a long period so that the cell functions like a DRAM cell. However, testing for such a subtle defect would typically require waiting for the failure to occur. Such a test takes much too long for typical production line testing. Consequently, the more marginal defects often appear in a product after it has been sold and goes into use. This may cause a part to acquire a reputation as unreliable and cause it to be an economic failure even though the defect is corrected.
It is therefore desirable to provide tests for detecting such marginal defects in SRAM arrays using tests which may be accomplished in the relatively short time available for production testing.